1. Field of the Invention
The invention is directed to a drive circuit, and a method for transmitting an input signal thereto, and more particularly to a drive circuit having a level shifter for transmitting an input signal from a drive logic to a driver.
2. Description of the Related Art
Drive circuits of the type to which this invention is directed are employed in power electronic systems to drive power semiconductor switches arranged as individual switches or in a bridge circuit. Bridge circuits of this type are known as single-, two-, or three-phase bridge circuits, wherein the single-phase so-called half-bridge constitutes a basic element of a multiplicity of power electronic circuits. In a half-bridge circuit, two power switches, a first so-called TOP switch and a second so-called BOT switch, are arranged in a series circuit.
A half-bridge of this type generally has a connection to a DC intermediate circuit. The output, typically the AC voltage terminal of the half-bridge is usually connected to a load. The drive circuit generally comprises a plurality of partial circuits or functional blocks. The control signal is conditioned in a first partial circuit, the drive logic, and fed via further components to the driver circuits and finally to the control input of the respective power switch.
At relatively high intermediate circuit voltages, for example greater than 100 V, the drive logic is usually isolated from the driver circuits in terms of potential, since the associated power switches are at a differential potential and isolation of the voltages is therefore essential. This isolation applies at least to the TOP switch, but is also embodied at higher powers for the BOT switch on account of a possible chopping of the ground potential during switching. Such isolation can be realized for example by pulse transformers, by optocouplers or optical waveguides (direct electrical isolation), or with the aid of integrated circuit technology in an HVIC (High Voltage Integrated Circuit). The latter variant is being used with increasing frequency on account of various advantages offered thereby, such as small dimensions, low price and long lifetime. At the same time, HVICs afford the possibility of integrating a high-voltage component with a breakdown voltage greater than or equal to the intermediate circuit voltage which can be used in circuits for signal level conversion, in so-called level shifters. A lateral high-voltage MOSFET is usually used for the latter.
The level shifter described is part of the drive circuit and preferably embodied as an integrated circuit arrangement. It serves for transmitting a signal from a circuit part having a defined reference potential to a circuit part having an occasionally higher or lower reference potential, or vice versa. Such an arrangement is required for the integrated and potential-isolated driving of power semiconductors.
Two basic isolation technologies are known for forming level shifters in the case of HVICs: “SOI” (Silicon On Insulator) technologies and pn-isolated technologies (junction isolation). SOI technology affords a dielectric isolation of components and component groups, but is currently available only up to a dielectric strength of 800 V. SOI substrate wafers are significantly more expensive than standard substrates, although the costs are offset by a series of technical advantages and also considerable process simplifications flowing from the dielectric isolation. In the case of pn-isolated technologies, the reverse voltage is taken up by a reverse-biased pn junction. This technology is currently available up to 1200 V. However, production is very complicated and therefore cost-intensive. Furthermore, there are technical problems, for example with leakage currents and latch-up effects, inter alia, at relatively high temperatures, such as, for example, more than 125° C. operating temperature, and also in the event of chopping of the ground potential during fast dynamic operations.
In integrated drive circuits, only the level shifter transmission of the drive signals from the drive logic to the TOP driver has been known heretofore according to the prior art. This is necessary since the TOP driver, in contrast to the BOT driver, is at an elevated reference potential in phases. According to the prior art, the signal transmission from the drive side to the TOP driver is effected by means of pulsed (dynamic) and differential transmission, that is to say that on the drive side switch-on and switch-off pulses are generated from the signal to be transmitted, said pulses being transmitted to the TOP driver via the respective level shifter. This increases the transmission reliability and reduces the power demand of the circuit. Various integrated level shifter topologies are known. The simplest topology comprises an HV transistor having a corresponding blocking capability and a resistor, which are connected in series with one another. If a signal is passed to the gate of the HV transistor, the latter switches on. The shunt current thereby generated through the level shifter causes a voltage drop across the resistor, which can be detected as a signal by an evaluation circuit.
DE 101 52 930 A1 discloses an extended level shifter topology in which the drive signal is transmitted progressively, by means of n known level shifters connected in identically cascaded fashion, via n−1 intermediate potentials. It is thus possible to use transistors which have only the n-th portion of the required blocking capability of the entire level shifter. If transistors having the required blocking capability are available, the blocking capability of the level shifter can be increased by the factor n.
DE 10 2006 037 336, not previously published, discloses a level shifter embodied as a series circuit comprising n HV transistors connected in series. This topology has the advantages that the power consumption and circuitry outlay are reduced by comparison with DE 101 52 930 A1. This results in a smaller space requirement and therefore also lower costs.
What is common to all the known topologies is that, in the case of complementary construction of the level shifter, a signal transmission from a circuit part having a high reference potential to a signal part having a low reference potential is also possible. This property can be utilized for signal transmission back from the TOP driver to the drive logic.
According to the prior art, in integrated drive circuits, the drive logic (primary side) and the BOT driver (secondary side) are put at an identical reference potential or reference potentials deviating from one another only by a few volts, such that no signal transmission via level shifters is necessary. In this case, the terminals for the primary-side and secondary-side reference potential are usually short-circuited externally. Due to module- and system-internal inductances, for example line inductances, however, severe chopping of the reference potential of the BOT drivers in a positive or negative direction can occur during the switching of the power components. This occurs to a particularly great extent in medium- and high-power systems in which large currents, for example greater than 50 A, are switched. In this case, the potential difference can assume values that exceed the reverse voltage of the gate oxides of the transistors used, for example greater than 20 V. Junction isolation technologies have the disadvantage that the triggering of parasitic thyristor structures, so-called latch-up, can occur in the event of a corresponding chopping of the reference potential in the negative direction. This leads to loss of function and possibly to destruction of the affected components. This limitation is not manifested in SOI technologies, due to the dielectric isolation of the components.
There is therefore a need in the art for an improved drive circuit, and method for using it.